The system check takes a simulation model as input and produces zero or more violations based on a number or rules.
High level
The System check takes an simuliation model as input and produces a systemCheckResult which is in essence a number of violations.
Some violations are structural, meaning the graph is too “damaged“ to do further calculations. Eg. in this diagram the algorithm exits early after finding incorrectly oriented base circuits. The pump in series in the bottom circuit are not detected, the user is expected to fix the structured problems first.
Intermedia representation
The intermediate representation is the minimal information we need to detect violations. It starts from the FpHydronicCircuit and throws away all irrelevant pieces such as pipes and symmetrical bcs. Those can not be connected incorrectly anyway.
Important detail, an FPGate is also an FpHydronicNode and will used in that way when creating equivalance relations
Create gate equivalences from simulation model
