High level
The System check takes an simuliation model as input and produces a systemCheckResult which is in essence a number of violations.
Intermedia representation
The intermediate representation is the minimal information we need to detect violations. It throws away all irrelevant pieces such as pipes and symmetrical bcs. Those can not be connected incorrectly anyway.
Important detail, an FPGate is also an FpHydronicNode and will used in that way when creating equivalance relations
Create gate equivalences from simulation model
